to the inherent mismatches that exist in CMOS devices. Hence, modern stimulators in­

corporate different charge balancing schemes to ensure safe operation [5,6].

An example neurostimulator with precise charge balance control was reported by Luo

and Ker [2]. They demonstrated a neurostimulator architecture implemented in a 0.18 μm

CMOS process. One particular design challenge that was overcome in this work is the

incorporation of high-voltage supplies (VDD and VSS in Figure 6.1) in a low-voltage CMOS

process. These high-voltage supplies are needed to deliver the correct amount of charge to

the tissue. The authors showed a self-adaptation bias technique and stacked MOS config­

urations that were able to reach the desired high voltage needed for stimulation. This was

achieved in the low-voltage CMOS process without compromising the devices’ oxide in­

tegrity. Furthermore, they showed precise charge balancing utilizing current memory cells

and dedicated calibration loops as well as leakage current compensation. The authors re­

ported less than 6.6 nA of average residual DC after the operation.

6.2.2 Neural Recording

The counterpart of neural stimulation is neural recording. This may also be achieved

utilizing CMOS chips. The goal of neural recording is to sense action potentials with a

high signal-to-noise ratio (SNR) and to condition the sensed signal for further processing.

Different types of neural signals exist. For instance, they can be low frequency (1 to

100 Hz) electroencephalogram (EEG) signals, local field potentials (LPF), or high fre­

quency (100 Hz to 10 kHz) action potentials, and they may span over a wide range of

amplitudes (10 µV to 10 mV).

Neural recording design is thus an intricate exercise in amplifier design. Furthermore,

high-fidelity recording can be quite difficult to achieve experimentally because the weaker

the signal of interest, the more likely it is to be compromised by intrinsic device noise

sources (e.g., thermal noise and flicker noise) and by extrinsic noise sources like noise from

power lines or EMG signals from nearby muscle tissue. To achieve high-SNR detection and

mitigate intrinsic noise sources, a commonly used strategy includes employing differential

signal recording schemes with low-noise and high-gain amplifiers. This approach mini­

mizes the input-referred noise at the recording front end.

In order to mitigate extrinsic noise sources, Stein et al. demonstrated how a tripolar re­

cording electrode configuration enables EMG cancellation when recording from peripheral

nervous system tissue before and after nearby muscle denervation [7]. Figure 6.2a and

Figure 6.2b show typical monopolar and bipolar recording configurations, respectively;

with these configurations, the signal of interest can be heavily corrupted by nearby EMG

FIGURE 6.2

Typical electrode configurations used in neural recordings: (a) monopolar, (b) bipolar, and (c–e) tripolar

configurations.

96

Bioelectronics